Vco-Based continuous-Time Sigma Delta ADC Based on a Dual-VCO-quantizer-Loop Structure

This paper explores a continuous time (CT) sigma delta ( ) analog-to-digital converter (ADC) based on a dual-voltage-controlled oscillator (VCO)-quantizer-loop structure. A thirdorder ̄lter is adopted to reduce quantization noise and VCO nonlinearity. Even-order harmonics of VCO are signi ̄cantly reduced by the proposed dual-VCO-quantizer-loop structure. The prototype with 10MHz bandwidth and 400MHz clock rate is designed using a 0.18 m RF CMOS process. Simulation results show that the signal-to-noise ratio and signal-to-noise distortion ratio (SNDR) are 76.9 and 76 dB, respectively, consuming 37mA at 1.8V. The key module of the ADC, which is a 4-bit VCO-based quantizer, can convert the voltage signal into a frequency signal and quantize the corresponding frequency to thermometer codes at 400 MS/s.